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Hardware description languages
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#	Item
41	1 Yosys Application Note 010: Converting Verilog to BLIF Clifford Wolf November 2013 Add to Reading List Source URL: www.clifford.at Language: English - Date: 2015-02-09 07:25:25 Digital electronics Logic design Verilog Logic synthesis Field-programmable gate array High-level synthesis Finite-state machine VHDL AS/400 Control Language Electronic engineering Hardware description languages Electronic design automation
42	HES-DVM™ HW/SW Validation Platform Hybrid Verification Platform HES-DVMTM is a Hybrid Verification and Validation Platform for Hardware and Software developers of SoC and ASIC designs up to 144M ASIC gates. Utilizing Add to Reading List Source URL: www.aldec.com Language: English - Date: 2015-02-02 17:14:32 Hardware verification languages Aldec Logic design Hardware emulation Hardware description languages Field-programmable gate array Joint Test Action Group Mentor Graphics Application-specific integrated circuit Electronic engineering Electronic design automation Digital electronics
43	ALINT-PRO-CDC™ CDC Verification Static Structural Verification Clock Domain Crossing Verification ALINT-PRO-CDC™ is a design verification solution from Aldec which enables verification of clock domain crossings and Add to Reading List Source URL: www.aldec.com Language: English - Date: 2015-05-05 17:04:02 Hardware verification languages Aldec Electronic design SystemVerilog E Clock domain crossing Verilog VHDL Functional verification Electronic engineering Electronic design automation Hardware description languages
44	Riviera-PRO™ Advanced Verification Verification Platform Riviera-PRO™ addresses verification needs of engineers crafting tomorrow’s cutting-edge FPGA and SoC devices. Riviera-PRO enables the ultimate testbench pro Add to Reading List Source URL: www.aldec.com Language: English - Date: 2015-05-05 17:04:52 Hardware verification languages Aldec Logic design SystemVerilog Verilog SystemC VHDL E Simulink Electronic engineering Hardware description languages Electronic design automation
45	1 Yosys Application Note 012: Converting Verilog to BTOR module test(input clk, input rst, output y); Add to Reading List Source URL: www.clifford.at Language: English - Date: 2015-04-04 09:14:12 Hardware verification languages Verilog E SystemVerilog Electronic engineering Hardware description languages Digital electronics
46	LATTICE ICE™ Technology Library Version 2.8 December 03, 2014. Add to Reading List Source URL: www.latticesemi.com Language: English - Date: 2015-01-13 20:52:06 Digital electronics Computer memory Electronic design Flip-flop Verilog VHDL Phase-locked loop Electronic engineering Electronics Hardware description languages
47	EN164: Design of Computing Systems Lecture 07: Lab Foundations / Verilog 3 Professor Sherief Reda http://scale.engin.brown.edu Electrical Sciences and Computer Engineering School of Engineering Add to Reading List Source URL: scale.engin.brown.edu Language: English - Date: 2014-03-23 13:27:01 Electronics Flip-flop Assignment Electronic engineering Hardware description languages Verilog
48	Yosys - A Free Verilog Synthesis Suite Clifford Wolf, Johann Glaser† Johannes Kepler University, Austria Institute for Integrated Circuits , † Add to Reading List Source URL: www.clifford.at Language: English - Date: 2013-10-11 16:34:33 Electronic design Integrated circuits Verilog Field-programmable gate array Standard cell Application-specific integrated circuit Logic synthesis High-level synthesis VHDL Electronic engineering Electronic design automation Hardware description languages
49	Yosys Open SYnthesis Suite Clifford Wolf (http://www.clifford.at/yosys/) Clifford Wolf http://www.clifford.at/yosys/ Add to Reading List Source URL: www.clifford.at Language: English - Date: 2015-02-09 07:25:30 Hardware description languages Logic design Technical communication Verilog Register-transfer level VHDL Field-programmable gate array Application-specific integrated circuit Logic gate Electronic engineering Electronic design automation Digital electronics
50	ProductLinePP1_Rev2013.04b Add to Reading List Source URL: www.aldec.com Language: English - Date: 2013-11-20 17:35:33 Aldec Electronic engineering Hardware description languages Electronic design automation

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